ECE 438 - Design of Computers - Fall 2009

Available information for ECE 438:

Sylabus

The long-awaited test bench for Assignment 1
Note that this will need to be copied into your work area and treated like any other VHDL module. Also note that the entity and port statement expected by the code is:

entity BOOTH_MULT is
  port (
    TC_H : in  STD_LOGIC;
    A    : in  STD_LOGIC_VECTOR ( 15 downto 0 );
    B    : in  STD_LOGIC_VECTOR ( 15 downto 0 );
    O    : out STD_LOGIC_VECTOR ( 31 downto 0 )
  );
end entity BOOTH_MULT;

Anyway, try it out.....