EECE 338 - Intermediate Logic Design - Fall 1996
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Instructor:
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L. H. Pollard
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Email:
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pollard@eece.unm.edu
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Office:
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EECE 224C
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Office Hrs:
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Mon. & Wed. 10 AM - Noon
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Phone:
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277-5982
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(Other times by appointment)
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Textbook: There is no current text for this book; you will need to
take copious notes, and from time to time handouts will be given in
class and information will be made available on the computer.
Computer information: will need account on the EECE departmental
systems. This will be used for Powerview schematic capture and simulation,
for compilation of ABEL files for PALs, as well as VHDL files for system
representation. You may need to run some compilation of files for
Altera PALs on "illusion".
Topics:
- Introduction to computer aided design (CAD): schematic capture
systems, simulation systems, design languages, and system integration.
- Advanced combinational circuits: look-ahead techniques, parallel
multipliers, dividers, shift networks, parity trees; floating point
hardware designs. Design with XOR logic and transmission gates.
- Information representation: theory and practice of value
representation and manipulation.
- Use of Register Transfer Languages (RTL) and Hardware Description
Languages (HDL) in the design process.
- Sequential design methodologies: delay line
methods, shift register methods, and state machine methods.
- Advanced sequential circuits: state assignments, state reduction,
equivalent states, redundant states, implication charts,
unspecified states.
- Programmable Logic Devices: design with registered and
combinational PLDs.
- Asynchronous design. Timing issues: set up, hold, clock to Q,
clock skew, transition time, pulse width.
- Hazards: static 0, static 1, dynamic 0, dynamic 1,
essential, gated clocks. Races, loops, oscillations.
- Introduction to VLSI concepts: complementary, compound, pass
transistor, binary tree structured logic, dynamic: precharge and
evaluate, domino, pseudo NMOS. Iterative logic arrays, recursive
transformation.
- Memories and memory interfacing: SRAM, DRAM, (E(P))ROM.
Required work: There will be three or four design assignments plus
some "regular" homework assignments. The design assignments
are non-trivial; plan to spend time on them.
Additional Readings:
- Fletcher, W. I., An Engineering Approach to Digital Design,
Englewood Cliffs, NJ: Prentice Hall, 1980.
- Mano, M. M., Digital Design,
Englewood Cliffs, NJ: Prentice Hall, 1984.
- McCluskey, E. J., Logic Design Principles with Emphasis on
Testable Semicustom Circuits,
Englewood Cliffs, NJ: Prentice Hall, 1986.