EECE 495 - Hardware Design with VHDL

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VHDL: The Language and Its Applications

The VHSIC Hardware Description Language (VHDL) was created for the purposes of documentation and communication with respect to hardware systems. The language was created with features specifically crafted to represent the complexities of digital hardware and systems. Thus, the language can be utilized to represent digital systems at the gate level, at the register level, at the chip level, or the system level. This course examines the language and how it represents digital systems at these various levels, and how this can improve the design process, and the communication process. With an ability to represent the systems at various levels in a precise manner, it is also possible to create simulation systems which will accept as input a digital system described in VHDL and simulate the action of the system to verify that the design functions correctly. It is also possible to create synthesis systems to implement specific digital systems from a VHDL description.

This course examines VHDL by studying the language and its features, then using the language to represent and simulate digital systems at various levels. Thus, the homework will consist of creating VHDL representations of digital systems, then simulating those systems. Work will be performed at various levels, starting with the lower (gate) level representations and expanding to other types of representations. There will be a final project required of all students; student wanting graduate credit for the course will be required to create complex systems for their projects.

The VHDL system which we will utilize is the Vantage system which is part of the PowerView package available at UNM. If you have access to another system and wish to use it, please send me e-mail with your request. In order to access the Vantage system, you will need a class account on the EECE systems; please use the EECE 495 class account for the work that you do for this class so that the instructor can access your information if you need help.

Course Text:

• J. R. Armstrong and F. G. Gray, Structured Logic Design with VHDL, Prentice-Hall, 1993.

Reference Texts:

• Bhasker, J., A Guide to VHDL Syntax, Prentice-Hall, 1995.
• Bhasker, J., A VHDL Primer, 2nd Edition, Prentice-Hall, 1994.
• Ashenden, P. J., The Designer's Guide to VHDL, Morgan Kaufmann Publishers, 1996.
• Coelho, D. R., The VHDL Handbook, Kluwer Academic Publishers, 1989.
• Lipsett, R., C. Schaefer, and C. Ussery, VHDL: Hardware Description and Design, Kluwer Academic Publishers, 1989.
• Perry, D., VHDL, 2nd Edition, McGraw-Hill, 1994.