Objectives:

1. A brief description of what to expect during this semester's labs.
2. Some tips to on how to prepare for the lab section of this course.

This course will take you from the old to the new. You will proceed from the first lab where you will be connecting several gates (AND, OR, NAND) to the final projects where you will be programming FPGAs and CPLDs. These devices which are about the size of a quarter are capable of creating projects of up to several million gates and can cost in the tens of thousands of dollars.

Here is a suggestion from a former student on the labs:
Get ahead on the labs if at all possible. Time always seems to run out at the end of the semester. If you cannot get ahead, then at least make sure the lecture, tutorial, and assignment have been read and the worksheet is completed before walking into the lab. Considering that you can download the software from the internet, you can actually do a lot of the labwork before the lab starts. What you will find is that the labs often do not run in parallel with the lectures. This is unfortunate but is almost uncontrollable. The labs have been structured to provide you with a wealth of background information in an attempt to make up for this.

In the first lab, small silicon chips will be connected with wires and then the connections checked through switch changes. The chips are in containers on the desk in the lab. Take out what you need and put them back when you are through. I strongly suggest you use the chip tester to check out your chip before you try to use it. You will use the Xilinx software in all of the labs. You will be shown a multitude of different ways to create projects with this software, but you must remember that the main underlying theme is going to be the VHDL software that makes the project work.

Some of you might want to acquire their own FPGA or CPLD to do you own projects at home. All the parts used in our lab can be found here.