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Lab 2 Lecture Notes - Introduction to ISE,
Testbenches and KMaps
Objectives
PART 1: Elementary Theorems The elementary theorems involve one variable (or a combination of variables that can be represented as one variable.) The first example involves a 2-input NOR gate. A 2-input NOR gate will be implemented using a 3-input NOR gate.
Here is the truth table for (A+B)´, (A+B+0)´, and (A+B+1)´.
PART 2: VHDL VHDL stands for VHSIC (Very High Speed Integrated Circuit) Hardware Description Language. This language resulted from the US Department of Defense's effort to advance and overhaul the way integrated circuits were exchanged between different companies. In 1987, the IEEE adopted as their standard IEEE Std. 1076-1987 (the language was updated in 1993). As the name implies, VHDL is a programming language that has been designed and optimized for describing the behavior of digital systems and integrated circuits. VHDL has features for describing the behavior of electronic components ranging from simple logic gates to complete microprocessors and custom chips. One of its major advantages is that it has the ability to facilitate design description at a higher level of abstraction than the gate level. The driving benefit behind VHDL is the ability to quickly go from software to hardware. You can use the software to describe the behavior of the circuit you wish to develop and then implement the design on programmable logic devices. Engineers that can program chips using VHDL are in extremely high demand. One of the purposes of this section of the course is to introduce you to VHDL and its use in project designs. In these lectures, we will discuss some of the different aspects of coding in this unique language. In the VHDL code for one of your projects in Lab 1, you have the following lines of code: LIBRARY ieee; ENTITY ckt_1 IS PORT (
); The above lines of code define the inputs and outputs - the ports - of this circuit. It is called a port declaration or an entity declaration. This code says that "ckt_1" will have two inputs. These inputs will be a and b. It also says "ckt_1" will have one output, f. The std_logic type is defined in the std_logic_1164 package, which resides in the IEEE library. In order to use it, we must first state the library in which it exists (IEEE) and then use it with the USE clause, separating the library and package names with a period. The "all" at the end of the use clause indicates that the entire contents of the std_logic_1164 package are visible, and therefore may be used. Although VHDL was written as an open-ended language for use with a wide variety of applications, this text will focus on VHDL use for design in programmable logic. CPLDs (Complex Programmable Logic devices) are basically digital devices with programmable behavior. They are similar to FPGAs (Field Programmable Gate Arrays). CPLDs and FPGAs typically come in packages with pin counts (number of pins on the chip) ranging from 44 to 1152. Much like simpler devices, such as AND, OR, or NOT gates, they accept logic inputs and produce logic outputs. The primary difference between programmable logic devices and simpler gates is that they can be programmed to behave in different ways, using VHDL. VHDL is used to describe digital hardware in an abstract (and therefore easily changeable) way. Why use VHDL, FPGAs, and CPLDs? There are many reasons why it makes good design sense to use VHDL: Portability: Technology changes so quickly in the digital industry that discrete digital devices require constant rework in order to remain current. VHDL is designed to be device-independent, meaning that if you describe your circuit in VHDL, changing hardware becomes a (relatively) trivial process. For example, suppose company X designed a high speed network switching device, using the latest and highest speed gate they could find, a NOR gate. Meanwhile, another company Y designed a similar high-performance switch, using VHDL and a CPLD. Both switches sell very well for a few months, and then some engineers announce that they have developed a new gate, an OR gate, that is faster than any other gate in the world. Both company X and Y would like to use this new technology to make their network switches run even faster. Since company X implemented their circuit with discrete NOR gates, they have to redesign, retest, and remanufacture their entire circuit! This will take them lots of time and cost lots of money. Company Y, however, designed using VHDL and a CPLD. A quick recompile of the VHDL code and they are done! This quick time-to-market and low cost redesign could essentially spell doom for company X. Flexibility: Most working engineers can recall a situation where they felt frustrated with their customer, supervisor or team members because the design specification that they were working with was constantly changing. Sometimes these changes cannot be helped. Design work is usually focused on creating small, easily maintainable components and then integrating these components into a larger device. On larger projects different teams of engineers will each design separate parts of the project at the same time. This can mean that if one component in the project changes, all of the components must change, even those being worked on by other engineering teams! Suppose you were told to design a simple counter that turned on a light after it had counted to 100. However, the software engineer working on this project discovered that the entire design could be radically simplified if your counter could count down from 300 instead of up to 100. If you had implemented your design in discrete circuits, you would have to start over from scratch. But, if you had designed using VHDL, all you wouldd have to do is change your code. Cost: The primary driving factors in the cost of printed circuit boards (PCBs) are the board area, or how large the PCB is, and the number of devices used on the board. Programmable logic devices can typically replace hundreds or thousands of discrete devices, cutting both area and device count dramatically. This has a major impact on board cost and manufacture-ability. Furthermore, complex digital devices usually go through several design cycles before they are ready for release. This means that the first few versions of the device will probably not work correctly and will need to be redesigned, re-manufactured, and re-tested. This can add a lot to the design cost of the device. Programmable logic devices simplify the physical device design. Simple designs tend to have fewer errors and require fewer revisions. Secondly, logical revisions are accomplished by software changes instead of hardware rewire. This adds speed to the design process consequently lowering your design cost. You are also writing and using testbenches for simulation purposes. Someone once asked about simulation and it's importance. Why we care about the lines going up and down. Those lines are actually voltages (usually 3-5volts (high) and 0volts (low)) that could be used as control signals to turn devices off and on. The benefit is sometimes hard to see. In this lab your projects will be small with only a few gates. Imagine if your assignment was a control system for a cardiac monitor. Simulation allows you to check your design while it is still in the creation phase. Once you begin burning 100,000 of these chips, it will be too late to start testing. Simulation allows you to do testing before the first chip is made. A lot of the information presented to you in these lab lectures does not come from your text but is presented to you in an effort to help further your understanding of the coding language. For computer engineers, this language is critical and the sooner and more you learn about it, the better off and more marketable you will be. For anyone taking additional Computer Engineering courses, keep all code you write so you can refer back to it when needed. For all others, it is an excellent tool for developing programmable chips. PART 3: K-MAPS This section will show you how to transition from complex (larger) equations to smaller equations and then to hardware. Let's start with a three variable problem and then progress to a four variable. Three Variables Here is a Boolean function of three variables. F3 = (Y + Z') X + X'YZ 1. Below is the truth table for F3
2. Below are two K-maps for F3. The results from the truth table have been incorporated into two different K-Maps.
3. Use either K-map to simplify the Boolean function. It does not matter which K-Map is used. The same conclusion will be achieved. F3 = Y Z + XZ' 4.Design an AND/OR circuit.
c. Dray a Layout diagram giving the relative position of the chips on the breadboard.
Four Variables Here is a Boolean function of four variables. F4 = B'CE'+ A'B'E'+ AC'E'+ ABC'E 1. Below is the truth table for F4
F4 = B'E'+ ABC' 4. Design a NAND/NAND circuit.
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alnz - Last update: June 21, 2004