Note: For Spring 2004 the boards have change to more modern versions. Here you will find the User Manual and the Schematics of the new boards. This page was developed as a memory mapped I/O tutorial for the Digilent combination boards in the 447 lab. There are certain things you should know about the software loaded onto the computers within the 447 lab. All of them have ISE 4.2SP3 loaded. There is a free downloadable version of this software available called Webpack. It has limited features but is excellent as a VHDL text editor and for checking syntax. You can find out more information about Webpack by looking HERE . You can also download a free 500-line version of ModelSim for simulating your designs. The lab tutorials within this web site are designed for both ISE and ISE Webpack. By clicking here you can download a completed memory mapped project for the boards in the lab. I will now take you through the steps on how to develop this AND gate project from start to finish. The entire project is nothing more than a two input AND gate. The code is extrememly well commented out so you should be able to make a great deal of sense by just reviewing it. Another good source for information on the boards is www.eece.unm.edu/digi and www.digilentinc.com . To help me better understand what is happening within the different sections of code, I drew out the state diagrams for the buttons/switches and the LED/SevenSegment portions of the code. Hopefully they will help you as well. Here they are.
Here you will find a link to the project that is used to program the 9500 CPLD that is on the I/O board. This is the board with the buttons and LEDs. Due to the nonvolatile nature of CPLDs, it isn't necessary to reprogram them each time. Do not reprogram the CPLD. It is programmed with this project before it is shipped out of the factory. The only reason I include this project is so that you can open it up if you want to gain a clearer understanding of how the two devices match together. Here is a simple tutorial for how to download the project from a zipped state onto the hardware in the lab. Download the zipped file to a location on the hard drive or onto a zip disk. Unzip the project. Start project navigator from the start programs section or by double clicking the project navigator icon on the desktop. Go to file open project and navigate to where you unzipped the project.
You should be looking at a screen similar to this one. Double click on the d2_test_simple.ndl file to launch the project.
The screen above is the actual project. By double clicking on each of the VHDL files on the upper left hand side of the screen you can read the VHDL. Be aware that if you do your project from scratch you will need to READ THE NOTES in the header file of the d2_test.vhd file. There are several examples of projects that can help you to better understand what you are looking at if this seems unfamiliar. It is strongly suggested that after you finish this tutorial you go to SAMPLE PROJECT and THE FPGA LAB and complete these tutorials. Combined, they will only take you about 30 minutes but will give you a more complete understanding of how the software works and what the different screens do.
Now what you are going to want to do is drop the design onto the chip. You can read about what the code does at your leisure. Ensure that the data switch box on top of the computer is set to JTAG and that the power cord is plugged into the board. When speaking of a power cord, I am referring to the fact that there is a 3.3V AC/DC adapter plugged into the wall. The other end of it should plug into the board next to the white printer cable. Most of the time, this power supply is unplugged to avoid wear and tear on the boards. When it is plugged in, you should see a red led on the right hand side FPGA board. It should look like the picture below. Double click on the "Configure Device (iMPACT)" icon shown in the above screen.
If you get a screen like the one above, it means that you have found the device and that you are able to communicate with it. Click once on the FPGA device (the square icon that says XILINX) and then right click.
Choose program and then select OK. If all goes as planned, your FPGA should now be programmed and the board should look like the one below. What you should see is a flashing light on the FPGA board and zeros on the seven segment displays of the CPLD board. All this project does is a simple AND gate so it really isn't very exciting. Flip switch 1 and 2 up and led 0 should come on. Be very careful of static electricity in the lab . Be sure you wear a wrist-grounding strap if there is a chance of touching anything on the board. Contact Ted (in your 447 class) if you believe the board isn't working. We have spares but there is nothing more frustrating than spending hours trying to figure out why your project doesn't work just to find out that the person before you smoked the board and didn't tell anyone. Power down the board when not in use.
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