---------------------------------------------------------------------------------- -- Digital Academy - VGA Lab -- Summer 2007 ---------------------------------------------------------------------------------- library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity reader is Port ( clk, reset : in STD_LOGIC; row : in STD_LOGIC_VECTOR (9 downto 0); col : in STD_LOGIC_VECTOR (9 downto 0); addr : out STD_LOGIC_VECTOR (15 downto 0); ennormal, enencryp : out std_logic; datain : in STD_LOGIC_VECTOR (2 downto 0); dataout : out STD_LOGIC_VECTOR (2 downto 0)); end reader; architecture Behavioral of reader is constant vtop : integer := 128; constant vbottom : integer := 351; constant htop1 : integer := 64; constant hbottom1 : integer := 287; constant htop2 : integer := 352; constant hbottom2 : integer := 575; signal addr_normal : STD_LOGIC_VECTOR (15 downto 0) := (others => '0'); signal addr_encryp : STD_LOGIC_VECTOR (15 downto 0) := (others => '0'); signal en_normal : std_logic := '0'; signal en_encryp : std_logic := '0'; begin ens : process (clk, reset) begin if reset = '1' then en_normal <= '0'; en_encryp <= '0'; elsif clk'event and clk='1' then if (row >= vtop) and (row <= vbottom) then if (col >= htop1) and (col <= hbottom1) then en_normal <= '1'; en_encryp <= '0'; elsif (col >= htop2) and (col <= hbottom2) then en_normal <= '0'; en_encryp <= '1'; else en_normal <= '0'; en_encryp <= '0'; end if; else en_normal <= '0'; en_encryp <= '0'; end if; end if; end process ens; c_normal: process (clk, reset) begin if reset = '1' then addr_normal <= (others => '0'); elsif clk'event and clk='1' then if en_normal = '1' then if addr_normal = 50175 then addr_normal <= (others => '0'); else addr_normal <= addr_normal + 1; end if; end if; end if; end process c_normal; c_encryp: process (clk, reset) begin if reset = '1' then addr_encryp <= (others => '0'); elsif clk'event and clk='1' then if en_encryp = '1' then if addr_encryp = 50175 then addr_encryp <= (others => '0'); else addr_encryp <= addr_encryp + 1; end if; end if; end if; end process c_encryp; addr <= addr_normal when (en_normal = '1') else addr_encryp; dataout <= datain; ennormal <= en_normal; enencryp <= en_encryp; end Behavioral;